Bootstrap Capacitor Calculation
Size the bootstrap capacitor for a high-side gate driver using gate charge, driver current, leakage, on-time, and allowable voltage droop. This calculator estimates the minimum capacitance, then applies a practical safety factor to recommend a real-world design target.
Expert Guide to Bootstrap Capacitor Calculation
A bootstrap capacitor is one of the most important support components in a high-side gate driver circuit. In half-bridge, synchronous buck, motor drive, and many switching power topologies, the high-side MOSFET source node moves with the switching waveform. Because of that moving reference, the driver needs a local floating supply that rides above the switch node whenever the high-side device turns on. The bootstrap network, usually made of a diode and a capacitor, provides that temporary floating energy source.
The reason correct bootstrap capacitor calculation matters is simple: if the capacitor is too small, the gate drive voltage droops during the high-side on interval. That voltage droop can reduce the effective gate to source voltage, increase MOSFET Rds(on), worsen thermal performance, slow switching, or in severe cases cause incomplete enhancement of the device. If the capacitor is too large, the design may still work, but startup charging, diode stress, physical size, cost, and leakage can become less optimal than necessary. The goal is to choose a value large enough to maintain a stable high-side drive voltage across the full operating range, while staying practical for the overall power stage.
In this equation, Qtotal is the total charge the bootstrap capacitor must deliver during the longest high-side conduction interval, and ΔVboot is the maximum allowable voltage drop on that capacitor. Although the formula looks compact, the challenge is properly estimating the charge term. At minimum, the total charge includes the MOSFET gate charge required for turn on. In many practical designs, it also includes high-side driver quiescent current, level-shift current, leakage current, reverse recovery related loss mechanisms, and any additional margin for component tolerances.
What charge terms should be included?
For a robust engineering estimate, total bootstrap charge is often modeled as:
Where:
- Qg is the total MOSFET gate charge from the transistor datasheet, usually given in nC.
- Qdriver is the high-side driver current multiplied by the maximum on-time.
- Qleakage is a practical reserve for bootstrap diode leakage, capacitor leakage, PCB contamination, level-shift consumption, and process spread.
If the driver datasheet directly gives a bootstrap refresh equation or an application-specific formula, that guidance should always take precedence over a generic estimate. Different gate driver ICs implement their high-side circuitry differently, so some devices draw more current from the floating supply than others. This is why the calculator above asks for the quiescent current and the longest high-side on-time rather than trying to hard-code assumptions.
Why allowable voltage droop is so important
The allowable droop term has a large influence on capacitor size. A smaller droop target means a larger capacitor. Designers commonly start with a target droop between 0.1 V and 0.5 V depending on the gate driver voltage, MOSFET threshold characteristics, and switching sensitivity. If your high-side gate driver runs from 10 V to 12 V and the MOSFET needs strong enhancement for low losses, keeping droop near 0.1 V to 0.2 V is often preferred. If the design is less sensitive, a higher droop target may still be acceptable.
Step by step bootstrap capacitor calculation
- Look up the MOSFET total gate charge at the intended gate voltage.
- Find the high-side bias or bootstrap supply current in the driver datasheet.
- Determine the longest possible high-side on-time in your control scheme.
- Add extra charge margin for leakage and parasitic losses.
- Choose the maximum acceptable bootstrap voltage droop.
- Compute the minimum capacitor using C = Q / V.
- Apply a safety factor, often 1.5x to 3x, and then select the nearest practical capacitor value.
- Verify capacitor DC bias derating, temperature performance, and placement on the PCB.
Worked example
Suppose a high-side N-channel MOSFET has a total gate charge of 35 nC at the intended gate drive voltage. The driver draws 230 µA from the bootstrap supply while the high-side is on. The longest on-time is 20 µs. You reserve another 5 nC for leakage and unmodeled losses, and you only want the bootstrap voltage to droop by 0.2 V.
First, convert the driver current term into charge:
Qdriver = I × t = 230 µA × 20 µs = 4.6 nC
Then total charge is:
Qtotal = 35 nC + 4.6 nC + 5 nC = 44.6 nC
Now size the capacitor:
Cboot(min) = 44.6 nC / 0.2 V = 223 nF
If you apply a 2x safety factor, the recommended practical target becomes about 446 nF, which usually leads you to choose a standard value like 470 nF. That example illustrates why many real designs land in the 100 nF to 1 µF range, even when the basic gate charge number alone suggests a smaller component.
Comparison table: effect of allowable droop
| Qtotal (nC) | Allowable droop ΔV (V) | Minimum Cboot (nF) | Recommended with 2x margin (nF) |
|---|---|---|---|
| 40 | 0.10 | 400 | 800 |
| 40 | 0.20 | 200 | 400 |
| 40 | 0.30 | 133 | 266 |
| 40 | 0.50 | 80 | 160 |
This comparison shows how strongly capacitor value depends on your droop target. Cutting the allowed droop from 0.2 V to 0.1 V doubles the required capacitance. That is why the droop term should be selected based on gate drive needs rather than arbitrary convention.
Comparison table: typical MLCC behavior under DC bias
| Capacitor type | Nominal value marking | Typical effective capacitance under bias | Design implication |
|---|---|---|---|
| X7R MLCC, 16 V rated, 0603 package | 100 nF | 85 to 100 nF | Usually stable enough for small bootstrap needs |
| X7R MLCC, 16 V rated, 0603 package | 1 µF | 300 to 700 nF | DC bias derating can be significant |
| X7R MLCC, 25 V rated, 0805 package | 1 µF | 600 to 900 nF | Larger case and higher voltage rating often retain more capacitance |
| C0G or NP0 ceramic | 10 nF to 100 nF | Near nominal value | Very stable, but large values are less common and more costly |
The exact capacitance retention under DC bias depends on manufacturer, dielectric, package, and voltage stress, but the trend is well known across ceramic capacitor technology: high-value MLCCs can lose substantial effective capacitance under bias. For bootstrap sizing, that means the nominal printed value is not always the value your circuit actually sees. If your calculation says 220 nF minimum, choosing a nominal 220 nF part with poor bias retention can leave you underdesigned in practice.
How switching frequency affects the design
Switching frequency matters, but not always in the way beginners expect. The bootstrap capacitor does not simply depend on frequency alone. It depends on whether the capacitor gets enough time to recharge and how long the high-side remains on. In duty-cycle limited PWM systems, frequency and duty cycle together determine on-time. In applications with nearly 100% duty cycle, the bootstrap supply can become difficult or impossible to sustain because there is not enough low-side interval to recharge the capacitor through the bootstrap diode. In those cases, a charge pump or isolated bias supply may be a better solution than a bootstrap network.
Common mistakes in bootstrap capacitor selection
- Using only MOSFET gate charge and ignoring driver bias current.
- Choosing a droop target that is too high for the required gate drive margin.
- Selecting a ceramic capacitor without checking DC bias derating.
- Ignoring capacitor tolerance and temperature variation.
- Assuming bootstrap circuits work indefinitely at 100% high-side duty cycle.
- Placing the capacitor too far from the driver IC, which increases loop inductance and noise.
- Forgetting that different gate driver ICs have different floating supply current characteristics.
Best practices for layout and component choice
Place the bootstrap capacitor physically close to the driver IC bootstrap and switch pins. Keep the loop from the diode to the capacitor to the IC compact. Choose a low-ESR ceramic capacitor, often X7R, with enough voltage rating margin above the bootstrap supply. Verify the effective capacitance at bias using the component manufacturer’s data. If your calculated requirement is near a standard boundary, go one size up rather than one size down. The cost increase is usually tiny compared with the risk of marginal gate drive behavior.
When a bootstrap capacitor is not enough
Bootstrap methods are elegant and low cost, but they are not ideal for every case. If your converter or inverter must hold the high-side switch on for very long intervals, if duty cycle approaches 100%, or if your gate driver current consumption is unusually high, a bootstrap approach can become limiting. In that situation, an isolated gate driver supply or integrated charge pump architecture can provide more reliable long-duration biasing. Bootstrap design is best understood as an energy reservoir with periodic refresh. If the refresh disappears, the reservoir eventually empties.
Useful references and technical reading
For foundational electronics and component behavior, review educational and standards-oriented resources such as MIT OpenCourseWare, the National Institute of Standards and Technology guide to metric SI prefixes and units, and university-level EE course material from institutions such as Dartmouth Engineering. These resources are valuable for understanding units, transient circuit behavior, and the practical interpretation of datasheet parameters.
Final design takeaway
Bootstrap capacitor calculation is straightforward when approached methodically. Start with total charge demand, divide by acceptable voltage droop, then add realistic margin for tolerances and effective capacitance loss. Engineers often find that the minimum theoretical capacitor is only the starting point. The final selected value must also survive temperature variation, DC bias derating, and worst-case duty cycle behavior. When in doubt, calculate conservatively, confirm with the gate driver datasheet, and validate on hardware by measuring the floating supply voltage during the longest high-side on interval.